Dongho Ha
Computer Architect · Meta Infra Silicon
I am a Computer Architect and ASIC Engineer on the Infra Silicon team at Meta. I earned my M.S. & Ph.D. from Yonsei University (advised by Prof. Won Woo Ro), specializing in GPU microarchitecture, memory subsystem optimization, and computing resource efficiency for large-scale AI workloads.
My background includes system architecture research for SmartNIC DPUs at MangoBoost, visiting research at UC Riverside, and joint hardware development projects with Samsung and SK Hynix.
Experience
Full backgroundASIC Engineer
2025 — PresentMeta · Infra Silicon
System Architect
2024 — 2025MangoBoost
M.S. & Ph.D.
2019 — 2024Yonsei University
Recent Publications
View all (20)SLGS: A Structure-Aware Scanline Renderer for Efficient 3D Gaussian Splatting
(The International Conference on Parallel Architectures and Compilation Techniques, PACT 2026).
(The International Symposium on Computer Architecture, ISCA 2026).
(The International Symposium on Computer Architecture, ISCA 2026).
(Quantum Machine Intelligence, QMI 2026).
(The European Conference on Computer Systems, EuroSys 2026).