Career Profile

I completed my Ph.D. at Yonsei University, Korea (Advisor: Professor Won Woo Ro), with a dissertation titled “GPU Architecture Design for Effective Computing Resource Usage.” My expertise spans the design of computer architectures—from general-purpose to domain-specific processors—with a focus on optimizing computing and memory resource utilization. My recent research has centered on improving GPU resource efficiency and democratizing domain-specific accelerators. To broaden my expertise from microarchitecture to system-level design, I worked as a system architect at MangoBoost Inc., where I explored SmartNICs to enhance MangoBoost DPUs. Currently, I am working at Meta as an ASIC engineer, further advancing my experience in cutting-edge chip design and large-scale hardware systems.

  • Fast learner
  • Resilient personality
  • Independent and highly motivated
  • Highly reliable team player or leader
  • Professional communication, writing, and presentation skills

Professional Experiences

ASIC Engineer

July 2025 (TBD)
Meta (Infra Silicon Team)

System Architect

July 2024 - Mar 2025
Mangoboost (RDMA)

Junior Specialist

Sep 2023 - Dec 2023
University of California, Riverside, USA (Advisor: Hung-Wei Tseng)

Education

PhD. in the School of Electrical and Electronic Engineering

Mar 2021 - Aug 2024
Yonsei University, Seoul, Korea (Advisor: Won Woo Ro)

Dissertation: GPU Architecture Design for Effective Computing Resource Usage

M.S. in the School of Electrical and Electronic Engineering

Mar 2019 - Feb 2021
Yonsei University, Seoul, Korea (Advisor: Won Woo Ro)

B.S. in the School of Electrical and Electronic Engineering

Mar 2014 - Feb 2019
Yonsei University, Seoul, Korea

Publications

BitL: Hybrid Bit-Serial and Parallel Processing for Critical Path Reduction
The International Symposium on Microarchitecture (MICRO 2025)
Avant-Garde: Empowering GPUs with Scaled Numeric Formats
The International Symposium on Computer Architecture (ISCA 2025)
M3XU: Achieving High-Precision and Complex Matrix Multiplication with Low-Precision MXUs
The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC 2024)
Generalizing Ray Tracing Accelerators for Tree Traversals on GPUs
The International Symposium on Microarchitecture (MICRO 2024)
Recompiling QAOA Circuits on Various Rotational Directions
The International Conference on Parallel Architectures and Compilation Techniques (PACT 2024)
TensorCV: Accelerating Inference-Adjacent Computation Using Tensor Processors
Dongho Ha , Won Woo Ro , Hung-Wei Tseng
The International Symposium on Low Power Electronics and Design (ISLPED’23)
R2D2: Removing ReDunDancy Utilizing Linearity of Address Generation in GPUs
Dongho Ha , Yunho Oh , Won Woo Ro
The International Symposium on Computer Architecture (ISCA 2023)
Investigation on NVIDIA Ampere GPU Architecture With Reverse Engineering
The International Conference on Electronics, Information, and Communication (ICEIC 2023)
Detecting Pattern of Warp Register Value Differences in CTA using GPU Compiler
Dongho Ha , Won Woo Ro
The International Conference on Electronics, Information, and Communication (ICEIC 2020)
Hardware Accelerator Systems for Artificial Intelligence and Machine Learning
Advances in Computers, Elsvier, vol. 122: Academic Press; 2020, Chapter 6
----- On-Going Projects (only project topics) -----
Floating-Point Format Compression
Collaborating with Won Woo Ro , Yonsei University
Scaled Numeric Format
Collaborating with Yunho Oh , Korea University
Advancing BitL
Collaborating with Babak Falsafi , École Polytechnique Fédérale de Lausanne
Outlier Handling in AI/Ml
Collaborating with Won Woo Ro , Yonsei University
DMA between GPUs
Collaborating with Won Woo Ro , Yonsei University
LLM Inferencing
Collaborating with Won Woo Ro , Yonsei University
Sparse NPUs
Collaborating with Won Woo Ro , Yonsei University
Advancing MAD Macce
Collaborating with Won Woo Ro , Yonsei University

Remarks

Industry Project
- Study on Memory Sub-System Architecture for Hyper-Scale AI Training, SK Hynix, 2024
- Development of PIM Software Architecture based on Data-Flow Computing, Korea Government (Institute of Information & communications Technology Planning & Evaluation, 2024
- Analysis and Development of GPU Architecture for HPC Workloads [Patent], Samsung (SAIT), 2021-2022
- Development of Data Center Many-core NPU Architecture and Memory Interface, Samsung, 2019-2020
- Development of CPU-GPU Heterogeneous Computing Simulation Environment, SK Hynix, 2019-2020
- Development of the Identification Data Processing Technology for On-site Police Officers, Korea Government (Korea National Police Agency), 2018-2023
- Development of Multi-GPU Based High Speed Ray-Tracing Engine, Samsung, 2017-2018
Conference Program/Review Committee
- International Conference on Microarchitecture (MICRO), 2025
- Workshop on General Purpose Processing using GPUs (GPGPU), 2025
Journal Reviewer
- IEEE Computer Architecture Letters (CAL) ×6 (2022-2025)
- IEEE Transactions on Emerging Topics in Computing (TETC) ×1 (2022-2023)
- ACM Transactions on Architecture and Code Optimization (TACO) ×2 (2022-2023)
Visiting Scholar
- University of California, Riverside, USA (Advisor: Hung-Wei Tseng), 2022 - 2023
Teaching Assistant
- EEE3530: Computer Architecture, Yonsei University, Seoul, Korea, 2021 Spring
- EEE4473: Embedded System Lab., Yonsei University, Seoul, Korea, 2020 Spring
Fundings
- BK21 FOUR Project Scholarship: 23,800,000 KRW
- Teaching Assistanct Scholarship: 3,716,000 KRW
- Research Assistance Scholarship: 3,000,000 KRW
- External Scholarship: 11,400,000 KRW
Blogs
- Ph.D. Guideline